Method of fabricating probe pin for probe card

ABSTRACT

Provided is a method of fabricating a probe pin. In the method, a concave region for a probe pin is formed on a mold substrate. The surface roughness of the concave region is reduced to smooth the surface of the concave region. A release layer is formed on the surface of the concave region of the mold substrate. A plating process is performed to form a probe pin corresponding to the concave region. After the performing of the plating process, the mold substrate having the probe pin is disposed on a circuit substrate and the probe pin is connected to a desired portion of the circuit substrate. Thereafter, the mold substrate is separated from the probe pin in such a way that the mold substrate remains unchanged. Also, the separated mold substrate may be reused.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims the priority of Korean Patent Application No.2008-0112201 filed on Nov. 12, 2008, in the Korean Intellectual PropertyOffice, the disclosure of which is incorporated herein by reference.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a probe pin for a probe card, and moreparticularly, to a method of fabricating a probe pin for a probe card,which makes it possible to simplify a fabrication process of the probepin and reuse a mold used for fabrication of the probe pin.

2. Description of the Related Art

A probe card is a test device for determining the defects or theelectrical characteristics of a semiconductor chip on a wafer by usingthe electrical contact with a probe pin. The probe card may include acircuit substrate such as a ceramic substrate with a circuit, and aplurality of fine probe pins that are electrically connected to thecircuit.

In general, a probe pin for a probe card mechanically contacts a wafer.Therefore, the body of the probe pin requires an excellent mechanicalelasticity because it must have a high yield strength and an excellentrestoring force. Also, the probe pin body must have a low electricalresistance because it electrically tests a chip.

Also, a tip portion of the probe pin mechanically contacting the chiprequires an anti-abrasion and a low contact resistance. A recent probetest device requires the improvement of the integration level of a probepin in order to test a highly-integrated semiconductor memory chip on awafer level in a batch fashion. Thus, the general trend is that a MEMSprocessing technology is used to form fine probe fines in a batchfashion, thereby improving the integration level of the probe pins.

In general, an electrode is formed at one side of a ceramic substrate; aMEMS process is performed to form a probe pin on a semiconductor wafersuch as a silicon wafer; and the ceramic substrate and the silicon waferare bonded together. Herein, the silicon wafer used as a mold is removedto form the probe pin on the ceramic substrate, thereby providing adesired probe card.

Herein, a probe pin fabrication method according to the related art canbe summarized into the following two methods.

The first method uses a polymer material to fabricate a probe pin moldon a ceramic substrate, fills the probe pin mold through a platingprocess to form a probe pin, and removes only the mold material so thatthe probe pin remains on the ceramic substrate.

The second method processes a selectively-removable substrate into adesired mold structure by means of a mold material, forms a probe pin inthe processed space through a plating process, bonds the probe pin withthe ceramic substrate, and selectively removes the mold substrate.

In the probe pin fabrication method according to the related art, themold forming process for fabrication of the probe pin is complex. Also,because the structure used as the mold is finally removed, the mold mustbe formed in every probe pin fabrication process. For example, if themold is fabricated using a polymer material, an exposing process, adeveloping process, a layer growing process, and a plating process areused to form a probe pin body (or a probe beam); the above processes arerepeated to form a probe tip portion; and a bonding process and a moldremoving process are performed to fabricate a probe pin. However,preprocessing processes such as a cleaning process, a surface treatingprocess, a polymer coating process, and a drying process are required,when considering only the exposing process, which increases thefabrication process time and the fault repair time of the probe card andreduces the chip production due to the test efficiency reduction in theactual field.

SUMMARY OF THE INVENTION

An aspect of the present invention provides a method of fabricating aprobe pin for a probe card, which makes it possible to simplify afabrication process of the probe pin and reuse a mold structure forfabrication of the probe pin by facilitating the separation of the moldstructure from the probe pin.

According to an aspect of the present invention, there is provided amethod of fabricating a probe pin, the method including: forming aconcave region corresponding to a probe pin on a mold substrate;reducing the surface roughness of the concave region to smooth thesurface of the concave region; forming a release layer on the surface ofthe concave region of the mold substrate; and performing a platingprocess to form a probe pin corresponding to the concave region.

The mold substrate may be a silicon substrate. The probe pin may have aprobe beam and a probe tip provided at one end of the probe beam.

The reducing of the surface roughness of the concave region may include:forming an oxide layer on the surface of the concave region; andremoving the oxide layer.

In this case, the oxide layer formed on the surface of the concaveregion may be a thermal oxide layer.

The release layer may be formed of a copper or a copper alloy.

The method may further include forming a mask layer on the surface ofthe mold substrate other than the surface of the concave region beforethe forming of the release layer. In this case, the method may furtherinclude removing the mask layer after the performing of the platingprocess.

The probe pin may be formed of one selected from the group consisting ofTi, Ni, Co and a combination thereof.

The method may further include, after the performing of the platingprocess, disposing the mold substrate having the probe pin on a circuitsubstrate and connecting the probe pin to a desired portion of thecircuit substrate; and separating the mold substrate from the probe pinin such away that the mold substrate remains unchanged.

The separating of the mold substrate from the probe pin may be performedusing the thermal expansion coefficient difference between the probe pinand the mold substrate.

Particularly, the separated mold substrate may be reused. That is, themold substrate separated from the probe pin may be reused in the surfacesmoothing process for reduction of the surface roughness, the releaselayer forming process, and the plating process for formation of theprobe pin.

BRIEF DESCRIPTION OF THE DRAWINGS

The above and other aspects, features and other advantages of thepresent invention will be more clearly understood from the followingdetailed description taken in conjunction with the accompanyingdrawings, in which:

FIGS. 1A to 1F are cross-sectional views illustrating a process offorming a probe pin in a probe pin fabrication method according to anexemplary embodiment of the present invention; and

FIGS. 2A to 2C are cross-sectional views illustrating a transfer processin the probe pin fabrication method according to an exemplary embodimentof the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

Exemplary embodiments of the present invention will now be described indetail with reference to the accompanying drawings.

FIGS. 1A to 1F are cross-sectional views illustrating a process offorming a probe pin in a probe pin fabrication method according to anexemplary embodiment of the present invention.

As illustrated in FIG. 1A, a substrate 11 for a mold (hereinafterreferred to as a mold substrate) is prepared for fabrication of a probepin.

The mold substrate 11 may preferably be a silicon wafer, to which thepresent invention is not limited. For example, the mold substrate 11 mayalso be other well-known semiconductor substrates that are easy toprocess. Specifically, the mold substrate 11 may be any substrate thatcan have a desired concave structure formed through an anisotropicetching process such as a Reactive Ion Etching (RIE) process.

Thereafter, as illustrated in FIG. 1B, a concave region P for a desiredprobe pin is formed at the mold substrate 11.

The concave region P may be formed to have a region 11 b for a probebeam (hereinafter referred to as a probe beam region) and a region 11 afor a probe tip (hereinafter referred to as a probe tip region), so thatit corresponds to a desired probe pin structure. One concave region Pfor one probe pin is illustrated in this embodiment. However, in anactual process, a plurality of concave regions for a plurality of probepins may be formed at a large-area silicon wafer.

The present process may be implemented using a well-known anisotropicetching process such as an RIE process, as described above.Particularly, if the concave region P is formed through an anisotropicetching process, each of the etched surfaces of the silicon moldsubstrate may have an inclined surface (e.g., 11 a) with respect to ahorizontal plane according to a desired probe shape. The etched surfaceswith different crystal surfaces can improve the releasability of themold.

Meanwhile, the surface of the concave region P, that is, the surfaceresulting from the anisotropic etching process may be damaged during theetching process and thus may have a high surface roughness. Because thehigh surface roughness of the concave region P hinders the achievementof the releasability of the mold, the present invention includes animprovement process for the surface of the concave region P. That is,the present invention uses at least a process of reducing the surfaceroughness (Ra) of the concave region P in order to smooth the surface ofthe concave region P.

For example, after the anisotropic etching process such as an RIEprocess is performed, a simple wet etching process may be performed inorder to reduce the surface roughness of the concave region P. However,a process of reducing the surface roughness of the concave region Paccording to a preferred embodiment of the present invention may beperformed through processes illustrated in FIGS. 1C and 1D.

That is, as illustrated in FIG. 1C, a thin oxide layer 12 is formed onthe surface of the concave region P. The oxide layer 12 may be a siliconoxide layer if a silicon substrate is used as the mold substrate 11. Theoxide layer 12 formed on the surface of the concave region P may be athermal oxide layer.

Thereafter, as illustrated in FIG. 1D, the oxide layer 12 formed on thesurface of the concave region P is removed to achieve the smoothersurface thereof. The removing process may be performed using awell-known wet etching process.

The smoothed surface of the concave region P achieved through the oxidelayer forming/removing processes can guarantee the high releasability ofthe mold.

In addition, as illustrated in FIG. 1E, a release layer 15 is formed onthe surface of the concave region P.

The release layer 15 of the present invention may be formed of anymaterial that is electrically conductive and also provides the highreleasability between the material of the mold substrate 11 and a metalused in the subsequent plating process.

For example, before forming a seed layer, the related art grows a Ti orCr layer in order to increase the adhesion to the silicon. However, thepresent method may not use Ti or Cr in order to secure the releasabilityof a probe pin.

The release layer 15 of the present invention may be formed of a copperor a copper alloy. The release layer 15 formed of a copper increases thecurrent density, thus making it possible to increase the efficiency ofthe subsequent plating process and provide the high releasability. Theadhesion (or the releasability) between the release layer 15 and themold substrate 11 formed of a silicon may be adjusted to a desired levelby controlling the thickness of the release layer 15.

The present process may be easily implemented by forming a mask layer 16such as a photoresist pattern on the surface of the mold substrate 11other than the surface of the concave region P before forming therelease layer 15. In this case, the mask layer 16 may remain until thestart of the plating layer, and may be removed after the completion ofthe plating process.

Thereafter, as illustrated in FIG. 1F, the plating process is performedto form a probe pin 17 corresponding to the concave region P.

In a specific embodiment of the present invention, the probe pin 17 maybe formed of one selected from the group consisting of Ti, Ni, Co and acombination thereof. The probe pin 17 formed by the plating process mayhave a prove beam 17 b corresponding to the concave region P and a probetip 17 a formed at one end portion of the probe beam 17 b. As describedabove, the release layer 15 formed of a copper of the present inventioncan guarantee the high current density, thus making it possible toeasily perform an electrolytic plating process.

The advantages and effects of the present invention can be clearlyunderstood through a process of transferring to a probe card substratesuch as a ceramic substrate.

FIGS. 2A to 2C are cross-sectional views illustrating a transfer processin the probe pin fabrication method according to an exemplary embodimentof the present invention.

As illustrated in FIG. 2A, a probe card substrate 21 a having a circuitformed thereon is prepared. The probe card substrate 21 may be amultilayer ceramic substrate.

As illustrated in the drawings, a metal bonding unit 27 is formed on acircuit region 22 of the probe card substrate 21. The metal bonding unit27 may have a predetermined height and may be formed of a portion of theprobe pin.

Thereafter, as illustrated in FIG. 2B, the mold substrate 11 having theprobe pin 17 formed therein is disposed on the probe card substrate 21,and then a portion of the probe pin 17 is connected to a desired portionof the probe card substrate 21.

Specifically, as illustrated in the drawings, one end portion of theprobe beam 17 b, formed on the opposite side of the end portion of theprobe beam 17 b having the probe tip 17 a formed thereat, is connectedto the metal bonding unit 27, thereby transferring the probe pin 17 tothe probe card substrate 21.

Thereafter, as illustrated in FIG. 2C, the mold substrate 11 isseparated from the probe pin 17 in such a way that the mold substrate 11remains unchanged.

The advantages of the present invention well appear in the presentprocess. That is, unlike the related art, the present inventionseparates the mold substrate 11 from the probe pin 17 on the basis ofthe high releasability, while maintaining the shape of the moldsubstrate 11, without removing the mold structure. As described above,the high releasability can be implemented by removing the surfaceroughness and using the release layer 15 that is formed of a conductivematerial such as a copper.

Particularly, the separated mold substrate 11 can be reused. The moldsubstrate 11 separated from the probe pin 17 can be repeatedly usedseveral times, due to the surface smoothing process for reduction of thesurface roughness, the release layer forming process, and the platingprocess for formation of the probe pin 17.

The separating process can be easily implemented by using the thermalexpansion coefficient difference between the material of the moldsubstrate 11 and the material of the probe pin 17 (including the releaselayer 15). In general, the bonding process is performed at hightemperature. Thereafter, only the probe pin 17 and the mold substrate 11are locally cooled at low temperature, thereby increasing theinterfacial stress due to the thermal expansion coefficient differencebetween the silicon and the metal and releasing the probe pin 17 alongthe metal layer introduced in the plating process. Actually, because thesilicon and the general metal have a thermal expansion coefficientdifference of about 4.4 times therebetween, the separating process usingthe thermal expansion coefficient difference, such as the locallow-temperature cooling process, can be easily implemented.

As described above, the probe pin fabrication method according to thepresent invention can simplify the mold forming process for fabricationof the probe pin and can continuously reuse the mold in the probe pinfabrication process. Consequently, the present invention can greatlyreduce the fabrication time of the probe pin and can greatly increasethe mass production through the reuse of the mold. Particularly, thepresent invention can reduce the fault repair time of the probe pin likea MEMS probe card, thus making it possible to increase the chip testefficiency.

While the present invention has been shown and described in connectionwith the exemplary embodiments, it will be apparent to those skilled inthe art that modifications and variations can be made without departingfrom the spirit and scope of the invention as defined by the appendedclaims.

1. A method of fabricating a probe pin, the method comprising: forming aconcave region corresponding to a probe pin on a mold substrate;reducing the surface roughness of the concave region to smooth thesurface of the concave region; forming a release layer on the surface ofthe concave region of the mold substrate; and performing a platingprocess to form a probe pin corresponding to the concave region.
 2. Themethod of claim 1, wherein the mold substrate is a silicon substrate. 3.The method of claim 1, wherein the probe pin has a probe beam and aprobe tip provided at one end of the probe beam.
 4. The method of claim1, wherein the reducing of the surface roughness of the concave regioncomprises: forming an oxide layer on the surface of the concave region;and removing the oxide layer.
 5. The method of claim 4, wherein theoxide layer formed on the surface of the concave region is a thermaloxide layer.
 6. The method of claim 1, wherein the release layer isformed of a copper or a copper alloy.
 7. The method of claim 1, furthercomprising: forming a mask layer on the surface of the mold substrateother than the surface of the concave region before the forming of therelease layer.
 8. The method of claim 7, further comprising: removingthe mask layer after the performing of the plating process.
 9. Themethod of claim 1, wherein the probe pin is formed of one selected fromthe group consisting of Ti, Ni, Co and a combination thereof.
 10. Themethod of claim 1, further comprising, after the performing of theplating process: disposing the mold substrate having the probe pin on acircuit substrate and connecting the probe pin to a desired portion ofthe circuit substrate; and separating the mold substrate from the probepin in such a way that the mold substrate remains unchanged.
 11. Themethod of claim 10, wherein the separating of the mold substrate fromthe probe pin is performed using the thermal expansion coefficientdifference between the probe pin and the mold substrate.
 12. The methodof claim 10, further comprising: performing the process of claim 1 byusing the separated mold substrate.